8086 It has 16-bit address lines to access I/O
8086 Microprocessor was designed by
Intel in 1976. Operations like multiplication and division can be easily
executed, as it has a powerful instruction set. It is a better version of 8085
The 8086 gave rise to the x86 architecture, which eventually became Intel’s
most successful line of processors.
Intel 8086 is a 16 bit integer processor. It has
16-bit data bus and 20-bit address bus. The lower 16-bit address lines and
16-bit data lines are multiplexed.
As 8086 microprocessor does 2-stage pipelining (overlapping
fetching and execution), its architecture is divided into two units:
Bus Interfacing Unit
Execution Unit (EU)
Features of Microprocessor 8086
is 16 bit processor.
It is available in 3 versions based on the
frequency of operation ?
8086 ? 5MHz
8086-2 ? 8MHz
(c)8086-1 ? 10 MHz
has 20 bit address lines to access memory. Hence, it can access
1 MB memory location i.e., 2^20.
has 16-bit address lines to access I/O devices, hence it can access 64K I/O
location i.e., 2^16.
has 16 bit ALU, 16 bit registers and internal data bus and 16 bit external data
bus. It makes faster processing.
It uses two stages of pipelining, i.e. Fetch Stage
and Execute Stage, which improves performance.
operation is in two modes:
o Minimum Mode: A system with only one
o Maximum Mode: A system with
uses a memory banking system. It means that the entire data is not stored
sequentially in a single memory of 1 MB but memory is divided into two banks of
has 256 vectored interrupts.
supports of Multiply and Divide operation as it has a powerful instruction set.
It consists of 29,000 transistors.
Interfacing Unit (BIU)
The Bus Interface Unit (BIU) generates the 20-bit physical memory address
and provides the interface with external memory. It operates with respect to
bus cycles (machine cycles). This means it performs various machine cycles such
as memory read, I/O read etc. to transfer data with memory and I/O devices.
instruction Queue (Q)
Segment Registers (CS, DS, ES, SS).
Instruction Pointer (IP).
Address summing block(?).
The BIU stores this pre-fetched instruction byte in FIFO register called
queue. Fetching the next instruction while executing the current instruction is
referred as the instruction pipeline. Bus Interface Unit produces the 20-bit
physical memory address by combining a 16-bit segment address with a 16-bit offset
There are four 16-bit segment registers:
segment (CS) – The CS register is used for addressing a memory location in the
Code Segment of the memory, where the executable program is stored.
segment (DS) – The DS contains most data used by program. Data are accessed in
the Data Segment by an offset address or the content of other register that
holds the offset address.
segment (SS) – SS defined the area of memory used for the stack.
segment (ES) – ES is
additional data segment that is used by some of the string to hold the
All general purpose registers of the 8086 microprocessor
can be used for arithmetic and logic operations. It fetches instructions from the Queue in
BIU, decodes and executes them. Within the microprocessor, it performs
arithmetic, logic and internal data transfer operations. In order to access the
external module, it sends request signals to the BIU
The EU contains eight 16-bit general
purpose registers AX, BX, CX, DX, SP, BP, SI and DI. Among these registers AX,
BX, CX, DX can be further into two 8-bit registers AH, BH, CH
and DH. The general purpose registers can be used to store or 16-bit
data during program execution.
A 16-bit flag register in the EU
contains nine active flags. Six of the nine flags in the flag registers are used
to indicate some condition produced by an instruction. The three remaining
flags are used to control certain operations of the processors.
There are 4 General Purpose
Registers- It stores operands for arithmetic like divide, rotate.
Registers- It holds the starting base location of a memory region within a data
Registers- It is primarily used in loop instruction to store loop counter.
Registers- It is used to contain I/O port address for I/O instruction.
16 flag registers available in the
8086. Nine flags are used: six status flags and three control flags.
Flag (CF): Set when there is a carry out of the high order bit (8 or 16 bit) of
Flag (PF): Set if result contains an even number of 1’s.
Carry Flag (AF): Set when there is a carry out of the low nibble.
Flag (ZF): Set if the result equals zero.
Flag (SF): Set if the result is a negative number.
Flag (OF): Set if the size of the result
exceeds the size of the ALU.
Flag (TF) – Used for on-chip debugging.
enable Flag (IF) – when this flag is set to 1 CPU reacts to interrupts from
Flag (DF) – this flag is used by some instructions to process data chains, when
this flag is set to 1 – the processing is done backward, when this flag is set
to 0 the processing is done forward.